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120 pages

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English

Fully worked-out solutions to end-of-chapter problems from ‘CMOS Integrated Circuit Simulation with LTspice’.

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About the author

Erik Bruun has been teaching analog electronics and CMOS integrated circuit design for more than 25 years at the Technical University of Denmark. From 1989 to 2016, Erik was a Professor in Analog Electronics and since 2016 he has continued his professional activities as a Professor Emeritus.

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Description

Content

- Fully worked-out solutions to end-of-chapter problems from ‘CMOS Integrated Circuit Simulation with LTspice’.
- A ‘must-have’ companion to ‘CMOS Integrated Circuit Simulation with LTspice’ which can be downloaded here.
- Includes a detailed guide on how to create the transistor model file used for many of the simulations in the problems.
- The problems are reprinted from ‘CMOS Integrated Circuit Simulation with LTspice’ in order to facilitate the reading of the solutions book.
- Also included is an appendix with corrections to ‘CMOS Integrated Circuit Simulation with Ltspice’.

- Preface
- Introduction

- Tutorial 1 – Resistive Circuits
- Problem 1.1
- Problem 1.2
- Problem 1.3
- Problem 1.4
- Problem 1.5
- Problem 1.6
- Problem 1.7
- Problem 1.8
- Problem 1.9
- Problem 1.10

- Tutorial 2 – Circuits with Capacitors and Inductors
- Problem 2.1
- Problem 2.2
- Problem 2.3
- Problem 2.4
- Problem 2.5
- Problem 2.6
- Problem 2.7
- Problem 2.8
- Problem 2.9

- Tutorial 3 – MOS Transistors
- Problem 3.1
- Problem 3.2
- Problem 3.3
- Problem 3.4
- Problem 3.5
- Problem 3.6
- Problem 3.7
- Problem 3.8

- Tutorial 4 – Basic Gain Stages
- Problem 4.1
- Problem 4.2
- Problem 4.3
- Problem 4.4
- Problem 4.5
- Problem 4.6
- Problem 4.7
- Problem 4.8

- Tutorial 5 – Hierarchical Design
- Problem 5.1
- Problem 5.2
- Problem 5.3
- Problem 5.4
- Problem 5.5
- Problem 5.6
- Problem 5.7
- Problem 5.8

- Tutorial 6 – Process and Parameter Variations
- Problem 6.1
- Problem 6.2
- Problem 6.3
- Problem 6.4
- Problem 6.5

- Tutorial 7 – Importing and Exporting Files
- Problem 7.1
- Problem 7.2
- Problem 7.3
- Problem 7.4