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PaulOS F020: An RTOS for the C8051F020

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Language:  English
This book covers the Silicon Labs C8051F020 MCU. It explains, with examples the PaulOS_F020 RTOS derived from the self-developed 8051 RTOS described in my 2-part Bookboon book ‘PaulOS – An 8051 RTOS’.
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This text book is intended for under-graduate Engineering and/or IT students studying micro-controllers and embedded systems. It covers mainly the C8051F020 family of mixed signals micro-controllers from Silicon Laboratories IDE ( Starting with the basic architecture it then moves on to explain the PaulOS_F020 co-operative Real-Time Operating System (RTOS) with full source code listing. This is derived from the self-developed basic 8051 RTOS fully described in my previous 2-part Bookboon book ‘PaulOS – An 8051 RTOS’ but specially modified for the high performance Silicon Lab MCU. Various example application programs using the Keil IDE ( and/or the Silicon Labs ‘Simple Studio’ are given as well as useful hints to avoid programming pitfalls.

  1. C8051F020 Basics
    1. Introduction
    2. Memory Types
    3. Program/Data Memory (Flash)
    4. External Data Address Space (XRAM)
    5. Register Banks
    6. Bit Memory
    7. Special Function Register (SFR) Memory
    8. SFR Descriptions
  2. PaulOS F020: a co-operative RTOS
    1. Description of the RTOS Operation
    2. PaulOS_F020.C System Commands
    3. Descriptions of the commands
    4. PaulOS_F020_Parameters.h header file
    5. Example using PaulOS_F020 RTOS
  3. Master – Slave RTOS
    1. Multi-controller RTOSs
    2. Master
    3. Slave
  4. Programming Tips and Pitfalls
    1. RAM size
    2. SFRs
    3. Setup faults
    4. Serial ports (UART0 and UART1)
    5. Interrupts
    6. RTOS pitfalls
    7. C Tips
About the Author

Paul P. Debono

Ing. Paul Debono read for his undergraduate degree in Telecommunications at the University of Malta which he followed 16 years later with an M.Sc. in Digital Communications from Loughborough University, U.K.

He has been employed with the University of Malta since 1983 within the Faculty of Engineering and the Faculty of ICT where he is a Senior lecturer in the Department of Communications and Computer Engineering.

Before joining the University, he had a 9-year stint in industry first with a Japanese firm Shin-Shirasuna Corporation and later with an Italian firm SGS-ATES. He is married to Maria, with two sons Neil and Luke.